Programmable logic devices (PLDs) (also sometimes referred to as complex PLDs (CPLDs), programmable array logic (PALs), programmable logic arrays (PLAs), field PLAs (FPLAs), erasable PLDs (EPLDs), electrically erasable PLDs (EEPLDs), logic cell arrays (LCAs), field programmable gate arrays (FPGAs), or by other names) are well-known integrated circuits (ICs) that provide the advantages of fixed ICs with the flexibility of custom ICs. Such devices typically provide an “off the shelf” device having at least a portion that can be programmed to meet a user's specific needs.
PLDs have configuration elements that may be programmed or reprogrammed. Placing new data into the configuration elements programs or reprograms the PLD's logic functions and associated routing pathways. Configuration elements that are field programmable are often implemented as random access memory (RAM) cells, which in PLDs are sometimes referred to as “configuration RAM.” Configuration RAMs are generally implemented as 6-transistor static RAM (6T-SRAM) or 8-transistor static RAM (8T-SRAM). Thus, configuration RAMs generally refer to SRAM.
The read and write access transistors in configuration RAMs are generally n-channel metal oxide semiconductor (NMOS) transistors.